Senior Analog Design Engineer | 高级模拟芯片

职责描述： "1. Define circuit architectures optimized for high bandwidth electrical and optical links; 2. Perform link level simulation in Matlab and/or SPICE to prove the architecture; 3. Circuit design of wireline and optical transceiver building blocks (High-Speed ADC & DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.); 4. Conduct peer reviews of circuit design and verification results; 5. Write document and working with validation team to evaluate silicon results."

任职要求： "1. Strong background in Serdes or ADC circuit design 2. Strong teamwork and communication skills 3. History of coming up with innovative circuit design or architecture is a plus 4. Experience in FinFET nodes such as 16/14/10/7nm is a plus 5. Hands-on experience with CAD tools like MATLAB, Python, ADS, HFSS is a plus.