模拟版图设计工程师

Responsibilities:
1) Designing complex layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies.
2) Reviewing and analyzing floorplans and complex circuits with circuit designers.
3) Working with circuit design team to plan/schedule work and negotiate any necessary layout tradeoffs as needed. 
4) Reviewing LVS, DRC and ERC reports to solve any issue. 
5) Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
6) Collaborate with SOC Back-end team to guarantee Analog IP release quality.

Requirements:
1) Over 3 years analog layout experience
2) Understanding of analog and mixed signal design and layout
3) Experience implementing analog layouts to achieve tight matching, low noise, and low power consumption.
4) High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
5) Knowledge of CADENCE layout tools
6) scripting skills in PERL or SKILL are considered a plus, but not required.
7) Excellent communication skills and able to work with cross-functional teams.