Jobdescription: We'researchingforaseniordesignengineerwhowillworktoghetherwiththetalentedteamtoexecutemostchallengingchipdesigntasks.ThemissionoftheteamistodefinethearchitectureandimplementthecustomedASICchipstoforhighperformancecomputing.
KeyResponsibilities: 1.ICBlockdesignforallfrontendphase. 2.ICchipleveldesignforallfontendphase Architecturedefine;RTLimplementation;AnalysisandOptimizationforperformance;AnalysisandOptimizationforpower;AnalysisandOptimizationfortiming;Designflow:lint/synthesis/sta/formalcheck;Silicondebugging.
Qualifications: 1.BS/MSwith5+yearsofexperienceinASICorFPGAdesign. 2.ExperiencewithCPUrelatedIPsdesignarehighlydesirable. 3.ExperienceasdesignleadforcomplexorhighspeedIPs. 4.Experiencewithallphasesoffrontendarchitecture,designandvalidation. 5.RTLCoding,DesignReviews,SYN,CDC,FEV,DFTinsertion,ATPGanalysis. 6.DemonstratedworkexperiencewithtimingAnalysis,AreaandPoweroptimizations,PerformanceAnalysis,DebugabilityandSecurityanalysis,ECOs,andPost-SiliconDebug. 7.ExcellentknowledgeofVerilogandpopularEDAsimulation&implementationtools. 8.GoodexperienceinscriptinglanguageslikePerl,Unixshellorsimilarlanguages.
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地址:北京市朝阳区将台路5号院1号楼2层2010室 EMAIL:wangtingting@eetop.com.cn
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